This invention relates generally to semiconductor processing techniques and, more particularly, to a method for plating copper interconnects in semiconductor circuits.
Interconnect lines in semiconductor wafers often comprise copper, for example, dual damascene copper interconnects disposed between interlayer dielectric materials. As current flows through the copper in the lines, electromigration of copper atoms over time degrades the integrity of the lines as copper migrates in the direction of the electron flow. The electromigration is usually most prevalent in the surface areas of the lines.
The copper material in the top surface of the lines is often capped with an electroless plated metal film such as, for example cobalt tungsten phosphide (CoWP) or a similar material. The metal capping film limits the effects of electromigration of the copper atoms in the lines.
A selective electroplating process is ideally designed to form the metal film only on regions corresponding to the copper lines. However, in actual practice, the plating process may also result in some of the metal material being formed on portions of the dielectric layer separating the copper lines. These undesired regions of plated metal atop the dielectric layer could in turn, result in a leakage of current between adjacent copper lines due to a reduced electrical resistance therebetween, which may in turn result in the shorting of the lines.